Total-Ionizing-Dose Effects on 3D Sequentially Integrated FDSOI Devices and Circuits

Abstract

Total-ionizing-dose (TID) effects on 3D sequentially integrated (3DSI) FDSOI MOSFETs and ring oscillator (RO) circuits. Firstly, bottom-layer devices show significant charge trapping, transconductance degradation, and increase in channel resistance during and after irradiation under worst-case negative gate bias and AC-bias conditions. This results in significant decrease in operating frequency in bottom-isolated ROs irradiated in the AC-bias state. The enhanced sensitivity for bottom-isolated devices and circuits is attributed primarily to increased interface- and border-trap formation at the buried oxide (BOX)/Si interface and/or lateral charge nonuniformities in the BOX. Secondly, as-processed top-layer devices have initial higher resistance and lower drive current because of the relatively low dopant activation within the source and drain due to the low temperature process. This results in initial low operation frequency of ROs in the top layer, and significant increases in the spacer resistance of the top-layer devices during and after irradiation. Finally, there is a strong layer-to-layer coupling effects of TID-induced oxide trapped charges in the intermediate dielectric layer on the top-layer devices. Charge trapping is enhanced near the interface of the top-layer device and intermediate dielectric layer when positive bias is applied to the bottom-layer device because electric fields are enhanced in the intermediate dielectric layer and directed toward the top-layer device. In contrast, little TID-induced coupling effects on the bottom-layer devices due to the electrostatic screening provided by the bottom-layer gate metallization.