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Aging Effects and Latent Interface-Trap Buildup in Metal-Oxide- Semiconductor Transistors

dc.contributor.advisorZhang, Enxia
dc.contributor.advisorFleetwood, Daniel M.
dc.creatorDing, Jiarui
dc.date.accessioned2021-09-22T14:52:03Z
dc.date.created2021-08
dc.date.issued2021-07-16
dc.date.submittedAugust 2021
dc.identifier.urihttp://hdl.handle.net/1803/16883
dc.description.abstractThis thesis focuses on the effects of aging during storage on the irradiation and annealing response of MOS devices with high oxygen vacancy densities in SiO2 gate dielectrics. In this work, effects of ~35 years of aging during storage are investigated for the radiation response and 1/f noise of Oki nMOS and pMOS transistors with high oxygen vacancy densities in SiO2. The short-term interface- trap buildup that occurs during irradiation is significantly enhanced in aged devices in this work, relative to earlier studies in 1989, 1997, and 2008. In contrast, similar latent interface-trap buildup is observed foraged pMOS devices that are irradiated and annealed at room and elevated temperatures under positive bias in this work and earlier studies. Significant latent interface-trap buildup is also observed for nMOS devices irradiated at 0 V and annealed at room and elevated temperatures under positive bias, a condition not evaluated in prior studies. Results strongly suggest that latent interface-trap buildup is due to H2 diffusion from sources that are remote from the transistor and cracking at charged O vacancies in SiO2, followed by proton transport to the Si/SiO2 interface and reactions with Si-H complexes to form interface traps. Models that attribute latent interface-trap buildup to long-term proton trapping at O vacancies in SiO2 appear to be ruled out by the results of this study. Additional insight is provided into the mechanisms of radiation-induced interface- and border-trap buildup after long-term storage of MOS devices.
dc.format.mimetypeapplication/pdf
dc.language.isoen
dc.subjectRadiation Effects, Aging effects
dc.titleAging Effects and Latent Interface-Trap Buildup in Metal-Oxide- Semiconductor Transistors
dc.typeThesis
dc.date.updated2021-09-22T14:52:03Z
dc.type.materialtext
thesis.degree.nameMS
thesis.degree.levelMasters
thesis.degree.disciplineElectrical Engineering
thesis.degree.grantorVanderbilt University Graduate School
local.embargo.terms2023-08-01
local.embargo.lift2023-08-01
dc.creator.orcid0000-0001-5943-459X


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