Hardware-Software Partitioning of Soft Multi-Core Cyber-Physical Systems
Typical single microcontroller embedded systems cannot easily satisfy the computational requirements of a new class of cyber-physical systems. For systems observing physical phenomena via multiple channels at high sampling rates, only FPGAs can provide the necessary trade-off between adaptivity and computational power. Yet, common SRAM FPGAs are hardly applicable for low-power applications due to inrush currents associated with duty-cycling. Novel flash FPGAs mitigate this problem; our platform, called MarmotE, is based on this concept. However, fewer developers are familiar with FPGAs, and the microcontroller approach has a large legacy code base to reuse. Thus, we propose a soft multi-core architecture in the fabric forming a loosely coupled network with a queue-based messaging framework for inter-core communication. This platform provides parallel improvements (as per Amdahl's Law) and a familiar Harvard abstraction. Cores may run at different clock rates for optimum power consumption. The nesC language was chosen for programming, as it enables modularity and assignment of independent tasks to cores. The single core development environment was augmented to help with the transition to the new architecture. A cycle accurate system simulator, called Avrora, was enhanced to fully support multi-core platforms. It evaluates whole sensor networks employing only the compiled binaries meant for the cores. Finally, a comprehensive Structural Health Monitoring case study has been conducted to show the level of system complexity, and demonstrate the benefits of the parallel platform. The main advantage of the architecture is that it provides better power consumption and response time properties for time critical applications by effectively pipelining tasks. It is especially beneficial, if most soft cores can be utilized equally.