dc.creator | Benakanakere Sheshadri, Vijay | |
dc.date.accessioned | 2020-08-22T20:58:29Z | |
dc.date.available | 2010-09-08 | |
dc.date.issued | 2010-09-08 | |
dc.identifier.uri | https://etd.library.vanderbilt.edu/etd-09062010-120803 | |
dc.identifier.uri | http://hdl.handle.net/1803/14091 | |
dc.description.abstract | Advances in fabrication technologies for semiconductor integrated circuits (ICs) have resulted in sub-100 nm feature sizes. Along with this desired reduction in dimension has come an undesired increase in vulnerability of flip-flops to soft errors, which are caused by energetic particles that either directly or indirectly deposit energy, and create electron-hole pairs in the semiconductor material. These charges, when collected at a circuit node, perturb the associated node voltage, creating a transient pulse, which may alter the data stored in the flip-flop, causing a single- event upset (SEU). Decreasing technology feature size has resulted in higher packing densities, as a result of which, single-event related charge might be collected at multiple nodes in a circuit. Circuit-level simulations predict increased vulnerability of flip-flop designs and increased occurrence of single-event upsets in advanced technologies due to multi-node charge collection from single-ion strikes. This trend is examined by simulating 3D models of the flip-flops in a terrestrial neutron environment using Monte-Carlo Radiative Energy Deposition (MRED) simulations for charge deposition in several technology generations. | |
dc.format.mimetype | application/pdf | |
dc.subject | Critical Charge | |
dc.subject | DICE | |
dc.subject | Q8FF | |
dc.subject | Charge threshold plot | |
dc.subject | MRED | |
dc.title | Upset trends in flip-flop designs at deep submicron technologies | |
dc.type | thesis | |
dc.contributor.committeeMember | Dr. Robert A Reed | |
dc.contributor.committeeMember | Dr. Bharat L Bhuva | |
dc.type.material | text | |
thesis.degree.name | MS | |
thesis.degree.level | thesis | |
thesis.degree.discipline | Electrical Engineering | |
thesis.degree.grantor | Vanderbilt University | |
local.embargo.terms | 2010-09-08 | |
local.embargo.lift | 2010-09-08 | |