dc.contributor.advisor | Holman, William T | |
dc.creator | Vibbert, Daniel S | |
dc.date.accessioned | 2022-05-19T17:48:23Z | |
dc.date.available | 2022-05-19T17:48:23Z | |
dc.date.created | 2022-05 | |
dc.date.issued | 2022-03-24 | |
dc.date.submitted | May 2022 | |
dc.identifier.uri | http://hdl.handle.net/1803/17437 | |
dc.description.abstract | Memory circuits rely on error detection and correction (EDAC) codes to protect stored data from single-event upsets (SEU). However, EDAC codes can be defeated if memory circuits are overwhelmed with multiple SEUs. This occurs if upsets accumulate from multiple single-events, or if a single-event causes multiple simultaneous upsets. In this work, the reliability of memory against radiation-induced multiple-bit errors is examined. A model that separates the temporal and spatial components of this reliability is described, and a simulation technique is presented to generate necessary physical parameters for the model. | |
dc.format.mimetype | application/pdf | |
dc.language.iso | en | |
dc.subject | radiation effects | |
dc.subject | single-event effects | |
dc.subject | reliability | |
dc.subject | single-event upset | |
dc.subject | multiple-bit upset | |
dc.subject | integrated circuits | |
dc.title | Spatial and Temporal Reliability Factors of CMOS Memories in Pulsed Single-Event Radiation Environments | |
dc.type | Thesis | |
dc.date.updated | 2022-05-19T17:48:23Z | |
dc.contributor.committeeMember | Massengill, Lloyd W | |
dc.contributor.committeeMember | Kauppila, Jeffrey S | |
dc.contributor.committeeMember | Reed, Robert A | |
dc.contributor.committeeMember | Csorna, Steven | |
dc.contributor.committeeMember | Warren, Kevin M | |
dc.type.material | text | |
thesis.degree.name | PhD | |
thesis.degree.level | Doctoral | |
thesis.degree.discipline | Electrical Engineering | |
thesis.degree.grantor | Vanderbilt University Graduate School | |
dc.creator.orcid | 0000-0002-2738-1099 | |
dc.contributor.committeeChair | Holman, William T | |