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Hot-Carrier Reliability Simulation in Aggressively Scaled MOS Transistors

dc.creatorPagey, Manish Prabhakar
dc.date.accessioned2020-08-23T16:05:29Z
dc.date.available2004-12-09
dc.date.issued2003-12-09
dc.identifier.urihttps://etd.library.vanderbilt.edu/etd-12032003-100902
dc.identifier.urihttp://hdl.handle.net/1803/15050
dc.description.abstractHot-carrier-induced degradation is a significant reliability concern in aggressively scaled metal-oxide-semiconductor~(MOS) transistors. The physical mechanisms responsible for hot-carrier degradation have been studied over the past several decades in order to devise methods to mitigate their detrimental effects. Several empirical and semi-empirical models have been popularly used in the industry to estimate the hot-carrier lifetimes of devices produced using specific semiconductor technologies. However, such methods use several simplifying assumptions that are not applicable to ultra-small geometry MOS devices. Furthermore, such models are not capable of predicting hot-carrier reliability variation with technology modifications. Such capabilities are essential for optimizing a technology to meet performance as well as reliability goals. In this dissertation, we have developed a hot-carrier modeling approach that avoids the assumptions made by traditional hot-carrier modeling techniques. Physical models for mechanisms that are significant in aggressively scaled device geometries have been included. In particular, models for carrier transport and heating in the semiconductor and injection into the insulator layers have been carefully selected for application to short-channel devices. A comprehensive model for the transport of injected carriers in the oxide and their interactions with defects in the oxide and at the oxide-semiconductor interface has been developed. The effects of long-term carrier trapping and interface trap generation due to hot-carrier injection have been simulated using this approach in a set of commercial and non-commercial technologies. The framework presented here represents an essential component of the technological design process for assuring hot-carrier reliability in current and future technologies.
dc.format.mimetypeapplication/pdf
dc.subjectmodeling
dc.subjectsemiconductor
dc.subjectreliability
dc.subjecthot-carrier
dc.titleHot-Carrier Reliability Simulation in Aggressively Scaled MOS Transistors
dc.typedissertation
dc.contributor.committeeMemberDr. Robert A. Weller
dc.contributor.committeeMemberDr. Sokrates T. Pantelides
dc.contributor.committeeMemberDr. Lloyd W. Massengill
dc.type.materialtext
thesis.degree.namePHD
thesis.degree.leveldissertation
thesis.degree.disciplineElectrical Engineering
thesis.degree.grantorVanderbilt University
local.embargo.terms2004-12-09
local.embargo.lift2004-12-09
dc.contributor.committeeChairDr. Ronald D. Schrimpf
dc.contributor.committeeChairDr. Kenneth F. Galloway


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