Spatial and Temporal Reliability Factors of CMOS Memories in Pulsed Single-Event Radiation Environments

Abstract

Memory circuits rely on error detection and correction (EDAC) codes to protect stored data from single-event upsets (SEU). However, EDAC codes can be defeated if memory circuits are overwhelmed with multiple SEUs. This occurs if upsets accumulate from multiple single-events, or if a single-event causes multiple simultaneous upsets. In this work, the reliability of memory against radiation-induced multiple-bit errors is examined. A model that separates the temporal and spatial components of this reliability is described, and a simulation technique is presented to generate necessary physical parameters for the model.