Radiation-hardened-by-design (RHBD) delay locked loops (DLLS): single event transient analysis, simulation, and hardening

Abstract

Single-event transients (SETs) due to terrestrial or space radiation exposure have become a growing concern in modern high-speed data acquisition systems and space deployed electronics. Therefore the single-event vulnerability of DLL and phase-locked loop (PLL) circuits are a particular concern for space-deployed systems, since SETs in spacecraft clock circuits can result in systemic failure i.e. data loss throughout entire ICs data acquisition network. Recent work has enabled the understanding of SET effects in mixed-signal PLL, but no previous work on the DLL radiation sensitivity has been recorded. This thesis presents the single-event analysis of two analog delay-locked loops topologies, and shows that the SET sensitivity of the circuit depends on the sub-circuit stroked. Simulations and analysis of the DLLs show that the voltage controlled delay line (VCDL) and the charge pump (CP) are the most sensitive modules to SET, in terms of maximum phase displacement and missing pulses generated by ion strikes. Implementing a voltage-based charge pump (V_CP) in the analog DLL, in order to mitigate persistent inverted-lock error, has significantly hardened the DLL to SET effects.